我现在用xc7z035ffg676-2这个芯片，该芯片只有两组GTX，现在我要用其中一组的GTX，一对用于PCIeX1配合clk0当输入时钟，另外三对用于HDMI收发器用clk1当输入时钟，让这一组gtx ..read more

Is the LVCMOS33 VOH min of VCCO-0.4v that's specified in the Kintex datasheet for when the output is driving 16ma or is it for various loads and more related to how the chip drives over manufacturing process and temperature? Thank you ..read more

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在硬件工程中设置了6个 uart16550串口，但是通过petalinux之后设备只能检查到4 ..read more

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clocking wizard IP核的配置问题， 图片1中，4个选项是什么意思，分别适用于哪些场景？？ 图片2中的报错如何处理？我要如何才能产生750M时钟？，或者我要如何才能把750M时钟运用到OSERDESE2 ..read more

Hi,  Here is my question: can Virtex-7 FPGA Gen3 Integrated Block for PCI Express work in Root Port mode? In pg023, it just says it supports Endpoint configuration,not likely pg054 7 Series FPGAs Integrated Block for PCI Express v3.1 which clearly says that it support Endpoint and Root Port configuration. But in the following pat of pg023(Virtex-7 FPGA Gen3 Integrated Block for PCI Express) , there are many descriptions about working in Root Port mode.And the product webpage of virtex-7  (https://www.xilinx.com/products/intellectual-property/7_series_gen_3_pci_express ..read more

Hi all, When I opened FPGA Editor for 7 Series FPGA, I noticed that for a LUT in a SLICEM, there are 3 types of configurations available: "LUT", "ROM", "RAM". I understand the behavior of the "RAM" mode, but I don't understand the difference between the "LUT" and "ROM" modes. Should they both be read-only and content-configured in the configuration phase during the boot-up stage? There is no discription of the "LUT" mode in the user guide (UG474), and I could not find any information about this mode online. Could someone kindly help clarify this difference? Thank you ..read more

My dear friends, I have made a custom board with XCZU3CG MPSoC. I can boot from sd card, but it gets kernel panic when I set root=/dev/mmcblk0p2. I have the settings added to system-user.dtsi. (Without no-1-8-v, the kernel won't even recognize mmcblk0 with p1 and p2.) (the clock setting seems useless, because I probed the SD_CLK, and it is always 50 MHz) &sdhci0 { clock-frequency = <25000000>; no-1-8-v; }; Still boot with the same sd card, except I set root=/dev/sda1 in bootargs, and attached a USB flash drive with rootfs.tar.gz loaded, and the root fs works. The system se ..read more